1. Field of the Invention
The present invention relates to a power amplifier having an idling current circuit which is capable of continuously feeding an idling current to an output power amplifying element in all cycles.
2. Description of the Prior Art
The circuit shown in FIG. 1 has been known. In FIG. 1, the reference numeral (1) designates a signal source resistance Rs; (2) designates an emitter resistor R.sub.2 which is common for an N-CH driver transistor (10) and a P-CH driver transistor (11); (3), (4), (5) and (6) respectively resistors which form a current variable constant current source; (7) designates an emitter resistor R.sub.7 of an N-CH power transistor (12); (8) designates an emitter resistor R.sub.8 of a P-CH power transistor (13); (9) designates a load resistor R.sub.L ; (10) designates an N-CH driver transistor Q.sub.1 ; (11) designates a P-CH driver transistor Q.sub.2 ; (12) designates an N-CH power transistor Q.sub.3 ; (13) designates a P-CH power transistor Q.sub.4 ; (14) designates a transistor for positive output current detection; (15) designates a transistor Q.sub.6 for negative output current detection; (16) designates a transistor Q.sub.7 as a positive variable constant current source; (17) designates a transistor Q.sub.8 as a negative variable constant current source; (18) and (19) respectively designate a diode for calibrating a temperature of the variable constant current source; (20) designates a voltage source for idling; (21), (22) respectively designate voltage sources for comparation; (23) and (24) respectively designate integrating capacitors; (25) designates a positive power source; (26) designates a negative power source; and (27) designates a signal source.
The operation of the circuit shown in FIG. 1 will be illustrated.
During no signal, the sum of an idling current I.sub.D fed from a fixed bias power source (20) and an idling current I.sub.V of a variable bias circuit set by detected voltages (E.sub.2 -V.sub.R7), (E.sub.3 -V.sub.R8) which are given by the equation: EQU E.sub.1 =(V.sub.BE1 +V.sub.BE3 +R.sub.7 I.sub.D)+(V.sub.BE2 +V.sub.BE4 +R.sub.8 I.sub.D) (1)
is fed to the power transistors (12), (13).
The positive half cycle in the N-CH side will be illustrated. A signal fed from the signal source (27) is fed through the signal source resistor (1) to the N-CH driver transistor (10) to drive the N-CH power transistor (12) whereby the output current I.sub.O corresponding to each signal source form is fed from the positive power source (25) through the N-CH power transistor (12) to the negative resistor (9). At this moment, the base-emitter voltage V.sub.BE5 of the transistor for detection (14) is given by the equation: EQU V.sub.BE5 =E.sub.2 -R.sub.7 (I.sub.D +I.sub.V +I.sub.O) (2)
The base-emitter voltage decreases depending upon increase of the output current I.sub.O. The transistor for detection (14) works for cut-off whereby the positive variable constant current source comprising the resistors (3), (5), the transistor (16), the diode (18) and the capacitor (23) does not feed an output current to the base of the N-CH power transistor (12) and the common emitter resistor (2) for the driver transistors (10), (11) as the load.
In the next negative half cycle, the output current I.sub.O is fed from the P-CH power transistor (13) through the emitter resistor (8) to the load resistor (9) to give the equations: EQU V.sub.BE1 +V.sub.BE3 +V.sub.R7 .apprxeq.E.sub.1 -(V.sub.BE2 +V.sub.BE4 +R.sub.8 I.sub.0).ltoreq.0(I.sub.0 &gt;&gt;I.sub.D I.sub.V) (3) EQU V.sub.BE1 =E.sub.1 -(V.sub.BE2 +R.sub.2 I.sub.2)&gt;0 (4)
Therefore, the N-CH driver transistor (10) does not cut-off whereas the N-CH power transistor (12) works for cut-off. At the moment, V.sub.R7 .ltoreq.0 is given. The base-emitter voltage V.sub.BE5 of the transistor for detection (14) is given as V.sub.BE5 =(E.sub.0 -0)&gt;0. The transistor for detection (15) works for turn-on to drive the transistor (16) as the positive variable constant current source through the integrated circuit. Therefore, the transistor (16) feed the current to the common emitter resistor (2) and the base of the N-CH power transistor (12) and the N-CH power transistor (12) does not work for cut-off in the negative half cycle. When excess of the idling current I.sub.V is fed to the N-CH power transistor (12) by the driving of the transistor (16) as the variable constant current source, the base-emitter voltage V.sub.BE5 =E.sub.2 -R.sub.7 I.sub.V is lowered to reduce the idling current I.sub.V whereby the normal idling current I.sub.V set by the reference voltage E.sub.2 and the base-emitter voltage V.sub.BE5 of the transistor for detection (5) and the emitter resistor (7) of the N-CH power transistor (12). The operation of the N-CH side in full cycle has been illustrated and the operation of the P-CH side is the same.
The conventional power amplifier has the aforementioned structure. Thus, it is possible to conduct the output power amplifying element in full cycle. However, the voltage variation in the half cycle for cut-off is not high enough to detect it in the case of small values of the emitter resistors (7), (8) of the power transistors. Thus it is necessary to increase the values of the emitter resistors (7), (8). The power efficiency is disadvantageously lowered in the case of large values of the emitter resistors (7), (8). In the half cycle for turn-on, excess of the voltage is applied between the emitter resistors (7), (8) whereby the transistor for detection (14) or (15) is cut-off and the variable bias circuit itself results in the switching operation. Even though the switching strain of the power amplifying element is improved, the switching strain of the bias circuit as the side-effect is disadvantageously given.